New ranking shows long-time leader Intel sliding closer to half the total sales in microprocessors.
In a recent paper published in National Science Review, Chinese scientists report an optoelectronic device with a new signal processing behavior named photon-controlled diode.
In a paper published in National Science Review, a research team from China achieves the layer-by-layer epitaxy of 4-inch multilayer MoS2 wafers.
Rensselaer Professor Nikhil Koratkar and team find critical advances in nanostructures.
The greatest potential for immediate reductions in GHG emissions in semiconductor manufacturing lies in reducing the energy used by manufacturing equipment.
Technologists from Intel, IBM, Microsoft and Cadence Design Systems are this year’s Silicon Integration Initiative Power of Partnerships Award winners, recognizing the Si2 volunteer team with the most significant contributions to silicon-to-system implementation.
Optimized 3nm process achieves 45% reduced power usage, 23% improved performance, and 16% smaller surface area compared to 5nm process.
Breker Verification Systems, a provider of advanced test content synthesis solutions, including RISC-V Cache Coherency and other SoC integration Verification Intellectual Property (VIP) in the “TrekApps” family, today joined RISC-V International (RVI) as a strategic member.
These joint endeavors extend the companies’ longstanding relationship as technology and business partners, including the recently announced next-generation EV Innovation Center (NEVIC) jointly established by Renesas and Tata Group’s Tata Elxsi in March 2022.
This is the first time that Advantest is collaborating with an Institute of Higher Learning (IHL) in Singapore.
This week, at the 2022 IEEE International Interconnect Technology Conference (IITC 2022), imec, a world-leading research and innovation hub in nanoelectronics and digital technologies, presents options to reduce the metal line resistance at tight metal pitches, mitigating the resistance/capacitance (RC) increase of future interconnects using direct metal patterning.
Palomar Technologies announced the consignment of an SST 5100 Vacuum Reflow Furnace at the Electronics and Photonics Innovation Centre (EPIC) in Paignton, UK.
SUTD scientists designed a novel functional 2D hybrid material for ultracompact memory and spintronic device applications.
Siemens and NVIDIA today announced an expansion of their partnership to enable the industrial metaverse and increase use of AI-driven digital twin technology that will help bring industrial automation to a new level.
Weebit Nano Limited, a developer of next-generation memory technologies for the global semiconductor industry, announced it has taped-out (released to manufacturing) demonstration chips integrating its embedded Resistive Random-Access Memory (ReRAM) module to SkyWater Technology’s foundry.
Flex Logix EFLX embedded FPGA brings reconfigurable computing to CEVA-X2 DSP instruction extension to support demanding and changing workloads.
Semiconductor industry leader releases annual environmental, social and governance report, and unveils new program to empower social impact.
SiFive, Inc., the founder and leader of RISC-V computing, today announced the opening of its new UK Research & Development (R&D) Center headquartered in Cambridge, United Kingdom.
Micron Technology, Inc. today announced it is shipping the world’s first 176-layer NAND SATA SSD designed for data center workloads.
A new Cloud-based technology “System-on-Cloud”, developed by the Anari AI team, introduces an optimized and efficient system from various different hardware and software architectures combined with machine learning models to revolutionize the way AI compute systems are utilized.
Purdue University’s College of Engineering is partnering with MediaTek Inc., a global fabless chipmaker, to open the Midwest’s first semiconductor chip design center, to be housed on Purdue’s campus.
Advanced Logic and Memory Applications require more deposition materials.
Intel demonstrates a tightly controlled eight-wavelength laser array on a silicon wafer with matched power and uniform spacing.
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