DAVID K. LAM, Chairman & CEO, Multibeam
This year, the semiconductor industry is witnessing tremendous growth led by the accelerated application of AI. If roadmaps from leading AI companies hold true, much more silicon will be needed to meet the demand for AI in 2025 – exciting news for both chipmakers and wafer fab equipment makers alike.
The CHIPS act is prompting new investments in the domestic semiconductor industry to expand domestic fab production capacity and increase R&D of new chips and multi-chip systems. We’re particularly excited about the National Advanced Packaging Manufacturing Program (NAPMP).
As advanced packing gains momentum, the industry will be looking to novel, creative processing solutions to handle the integration imperatives of today – and tomorrow. Specifically, advanced lithography technology enabling larger field of view, greater depth of focus, and higher resolution will play a crucial role in accelerating to next generation multi-chip systems. An example is Multibeam’s multicolumn electron beam lithography (MEBL).
MEBL is capable of writing both broad and fine lines (from microns to deep submicron), allowing chips to be placed much closer to each other in a package. This increases interconnect pitch density on chip “beachfronts” by tightening the interconnect pitch, and significantly reducing the data path length of interconnecting chips. All this works together to dramatically reduce the energy consumed by chip-to-chip communication in a package.
The rise of AI and high-performance computing (HPC)-driven applications necessitates innovative ways to scale performance and reduce the energy consumption burden plaguing conventional data centers. Large-scale advanced heterogenous integration allows for fabrication of extremely high-density interconnects, delivering rapid chip-to-chip communication, with improved signal integrity and power efficiency. For systems designers, this enables seamless heterogenous chip-to-chip communications at the speed and power of the high-performance on-chip interconnects.
Burgeoning AI, memory and logic, 5G communication, and automotive sectors will continue to drive demand for faster processors and tighter connections. High-density wafer-scale heterogenous integration of leading-edge CPUs, GPUs, and HBMs, utilizing deep sub-micron interconnects for higher bandwidth and lower power, will enable scaling up of AI compute and a vast array of new applications… an exciting future that’s just getting started.
Furthermore, the invigorating renaissance of 200mm wafer fabs and volume production will continue throughout 2025. Many compelling emerging technologies such as SiC, MEMS, and SiPho, rely on 200mm (and smaller) substrates, and are driving a tremendous ramp in compound semiconductor and wide bandgap chip production.
However, they are limited by the patterning challenges of conventional optical lithography. High-productivity e-beam litho systems that deliver next-generation resolutions, greater depth of focus (DoF) capabilities for bowed wafers with high topography, better line edge roughness (LER), and the flexibility of direct-wafer writing can meet these challenges, allowing for seamless, sustainable, rapid development and production at high volumes.
Click here to read the 2025 Executive Viewpoints in Semiconductor Digest
