Peter Lee, director of a global team responsible for the DRAM design environment at Micron Technology, will receive the quarterly Silicon Integration Initiative Pinnacle Award. This award recognizes volunteers for their exceptional contributions to Si2’s success as a leading semiconductor R&D joint venture.
Lee serves as chair of the Si2 Compact Model Coalition, an international group that supports the development of standard compact SPICE models and standard interfaces to promote simulation tool interoperability. He has led the CMC since 2016, during which time the group has partnered with leading universities and research labs to fund four new device models and 11 existing standard models adopted by semiconductor manufacturers, designers and simulation tool providers. The CMC has consistently increased overall funding to model developers under Lee’s chairmanship.
Lee has more than 30 years of device modeling and circuit-level reliability simulation experience at Micron, Elpida Memory, Renesas Technology, and Hitachi. He earned his Ph.D. in Electrical Engineering from the University of California at Berkeley and is a senior member of the IEEE.
John Ellis, Si2 president and CEO, stated, “Peter has been a leader within the CMC since they first joined forces with Si2 in 2013, first as co-chair and then as chair. It’s a pleasure to work with Peter and recognize him publicly for his diligent effort in guiding this prestigious group. Si2 is grateful to Micron for enabling Peter to continue his efforts within the CMC.”
