What were the most significant technological advancements in our industry in 2007?
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This year’s forecast points toward healthy, confident growth in packaging. Some of the most significant growth is in the area of 3D stacked die and system-in-package. It’s amazing how many industry leaders mentioned the adoption of and deployment of 3D packaging. These same experts used words like “shift, mobile device, driving force, and increased speed”. Hence the cover photo with a stacked package is symbolized by an automobile. There are plenty of challenges to go around, and each company has a different expertise. Some are involved in stretchable electronics, wafer-scale packaging, embedded components, wafer bumping, wire bonding, high-volume MEMs, µPILR, through silicon via (TSV) technology, inspection, test and all of the rest. The coming year will be a true test of the faster, smaller, cheaper proposition in creative electronics.
Jamie Andes, Synergetix
In 2008, the shift to wafer level packaging (WLP) will continue to increase. Manufacturing and test methodologies are evolving quickly to meet this demand. Test is moving away from traditional probe card technologies and into interposer-style test sockets, making WLPs more attractive as the cost of test reduces.
Devices with a 0.4-mm pitch are considered last year’s innovation. The next wave of devices, scaled down to sub 0.3-mm pitches, is already hitting engineering test boards. The challenge with testing these devices is not simply a mechanical one, as electrical performance requirements are generally higher in previous generations. Contact providers are striving for the next smallest, fastest, and lowest cost interconnect.
Jack Belani, Kulicke & Soffa
While the demand for multi-chip functionality and greater package density continues to grow, the increased use of stacked die and system-in-package (SiP) technologies for a wide variety of other types of electronics is becoming more prevalent. K&S has accelerated its development in both equipment and materials to stay ahead of this technology curve. Through SiP, our industry has been able to capitalize on the integration of various types of IC packaging technologies while bypassing high cost and long lead times associated with system-on-chip (SoC).
We’ll continue to see more square inches of silicon being packed into individual devices to provide a higher level of capability, resulting in even more complex stacked-die applications. SiP will continue to lead the way in driving more integration at the package level.
Michael Bereziuk, Tessera, Inc.
Mainstream adoption and deployment of 3D packaging technologies signal a necessary shift for the mobile device market beyond what Moore’s Law alone can achieve with 2D silicon.
In cell phones, the integration of video and audio features increases the demand for higher memory densities with lower profiles. Additionally, a desire for higher resolution camera modules, and the need to support multiple RF modules and higher performance interfaces is driving the adoption of 3D and wafer-level solutions. For gaming platform and servers, thermal and electrical interconnect challenges are driving designers to more efficient interconnect technologies for stacked components.
Achieving the combination of low profile, high density, mixed functionality at low cost and high reliability will be one of the biggest challenges for 2008. Tessera’s μPILR and wafer-level technologies address the density, performance and reliability issues on the silicon and interconnect side, while our OptiML™ technology uses wafer-level solutions and smart optics addresses camera challenges.
Eric Beyne, Ph.D, IMEC
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Papers and conferences on 3D integration based on TSVs abound in 2007. Next to 3D packaging, stretchable electronics appeared on the scene, opening the door to applications such as wearable electronics and smart clothing. Linked to this evolution is the trend towards embedded components and bumpless packages. IMEC has extended its 3D packaging program, and bases its research on system requirements, rather than pure process developments.
For advanced packages, medical applications will become an important market, and will include integration in flexible substrates, embedding components such as chip-in-a-wire for cochlear implants, and biocompatible packages for implants.
New solutions have to be found to interconnect high-density ICs with very tight I/O pitches to low-cost packages and PCBs. IMEC and the Microsystems Packaging Research Center at the Georgia Institute of Technology (PRC), have set up an advanced research program on next-generation flip-chip and substrate technology.
Bob Black, Juki Automation
High quality standards and customer satisfaction are important for continued rapid growth. We must continue to ensure that quality remains high. Reliable placement systems will continue to ensure an on-going record of success.
Steve Brodeur, Milara
Milara expects potential tor wafer bumping for 300-mm fully automated systems to replace existing 150 and 200-mm systems, and has responded by introducing the AWPb 300 automated wafer bumping system for the semiconductor market. We also see growth in wafer printing for clients looking to move away from traditional wafer bumping techniques. We will also be focusing on volumetric printing applications as we seek to penetrate into BGA substrate printing – one of the most stringent and challenging applications. We will introduce a “green” solar powered fabrication building using state-of-the-art solar cells from Suntech Power Co.
Joseph S. Bubel, Hesse & Knipps
We have seen a jump in component manufacturers requiring advanced automation capabilities such as boats and magazines, including companies adopting automation for the first time. Our improved technology provides component performance traceability for devices manufactured on our equipment, enabling equipment users to pass on to their customers electronic archive evidence of device integrity and individual wire interconnections.
Successful use of onboard cameras and software for improved vision, safety, and quality promises continued growth in automotive electronics. As such, the percentage of components manufactured for the automotive market will grow. Also, interest in using our bonding equipment for photovoltaic interconnects may signal growth for “green” power generation.
Our challenge lies in continuing to interpret the needs of customers and turning those needs into successful bonding equipment products and enhancements that enable our customers to improve productivity.
John Byers, Asymtek
The emergence of package-on-package (PoP) as a viable solution should have a significant impact on future designs. The use of corner and edge bond technology to stabilize and protect components has also seen an increase for consumer products. The integration of MEMs devices into high-volume, consumer products has been significant.
The transition from wire bond to flip chip continues to exhibit strong growth. Memory devices will have the most potential growth in that transition due to the need for increased speed. The growth of high power LED packages is also an interesting trend as the LED industry turns to packaging technologies to solve problems of heat dissipation and high yield manufacturing.
Asymtek will defend intellectual property and significant investment in R&D that resulted in the jetting technology as similar technologies emerge. Asymtek is also undertaking its biggest product launch in the 25 year history of the company. The new products will replace a significant portion of existing products.
Joe Fjelstad, Silconpipe
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Advances in packaging and interconnections tend toward evolutionary steps and incremental changes. That said, Tessera’s uPILR technology has taken stacked packaging to a new level by reducing the overall profile of the individual stacked package. This bodes well for those interested in solid state memory in portable product applications. Another area of advancement has been in TSV technology and wafer stacking.
Based on the evidence, stacking of semiconductors – whether it be performed as chips in packages, packages on packages, wafers on wafers or any combination thereof – will continue on the path to higher growth as it has done in the past couple of years. It also appears that with WLP moving into mid-range pin counts, there could be some significant growth there. Continuing to meet cost and performance demands of the customer will be key.
Tom Forsythe, Kyzen
In 2007, lead-free moved from required to reality. Clearly the seismic shift from tin-lead to lead-free is now being implemented in broad areas of the market, some of which were not expected to convert this early in the game. This is having broad ranging effects throughout the industry.We are seeing package growth throughout the world, albeit dominated by East Asia markets.
2008 is shaping up to be a very positive year at Kyzen. We expect strong growth in all sectors, and will be expanding staff, footprint, and capabilities to meet both the growing needs of our customers as well as the emerging needs throughout the world.
Richard Frisk, Lloyd Doyle Ltd.
As Lloyd Doyle is new to the packaging industry, our general interest is in solving inspection or test problems where no solution exists. The major challenges for us are introducing products into a new market. We know that we will have to undergo extensive benchmarking and field trials to establish our name, even before we consider the huge development that goes with new products. We know that the IBIS products are ground-breaking in terms of offering laboratory-scale accuracy at production speeds and that the industry in general needs this product, but we have to balance that against profiting from the product, as is always the case in niche markets.
Roland Heitmann, Unovis Solutions
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We foresee strong, technology-driven growth in 2008. On the semiconductor front, module assembly or SiP is on a fast ramp up and our direct-die feeding solutions are enabling high-speed, SMT-style, module assembly. A need for automation in medical electronics is also significant and will fuel demand for our knowledge-based solutions. Finally, the electronics content in the automotive sector continues to rise in all regions and drives a need for large-scale automation.
What markets will show the most growth for advanced packages in 2008?
Bruce Hueners, Palomar Technologies
In 2007, 8 GB memory modules resulting from increasing memory per mm3 and per dollar, packaged compactly with ever-thinner stacked die, extended capabilities for products such as diskless video recorders and players, cameras with video, and cell phones/PDAs/MP3 players. Further LED technology advancements like smart, compact high bright LED arrays in UV, visible, NIR, white and RGBA are being used for security, industrial and forensic applications including skin treatment and wound healing.
LED lighting and solar concentrators, will be high-growth areas. For advanced packaging, improved thermal management will enable LEDs to be driven at higher outputs without compromising reliability or working life.
Making our customers successful with their new product introductions, notably with leading-edge products in the solar and LED arenas will be a challenge for Palomar in 2008.
John Isaac, Mentor Graphics Systems Design Division
In 2007 Mentor’s customers saw a significant increase in the use of advanced technologies including high-density interconnect (HDI)/micro-vias, embedded passives, mixed technologies on the same substrate. This was primarily driven by the handheld industries.
SiP is rapidly emerging driven by the handheld industries. The need to fit more function in smaller spaces, and, move some complexity to the package from the PCB can achieve these goals while keeping the product cost in line.
Keeping our customers ahead of advancing technology while supplying the capabilities they require to support design collaboration across the enterprise will require Mentor to continue our high level of R&D investment and deliver innovative design technologies.
Mike Konrad, Aqueous Technologies
2007 can be defined as a year of continued lead-free implementation. Higher reflow temperatures have created a more difficult defluxing process. Aqueous Technologies has introduced new defluxing chemicals and equipment designed to meet the lead-free challenge.
The move for simultaneous improvements in both environmental impact and reliability of the end product has, in the past been at odds. Advances in defluxing and cleanliness testing technology in 2008 will align these frequently opposing forces.
The electronics industry is one of the few industries whose customers demand faster, smaller, and more reliable technology for continually lower prices. As a US manufacturer, we continue to battle the economic pressures to export our manufacturing process. 2008 will further the requirement of continuous product improvement and value.
Casey Krawiec, StratEdge
In 2007 GaN and SiC compound semiconductors emerged. The maturation of GaN and SiC technology has the potential to put pressure on existing products in many markets.
The military and aerospace markets will show the most growth in 2008, which is good for StratEdge. We’ve always focused on providing products with high performance and good quality, which are requirements for military and aerospace customers.
The challenge we foresee for 2008 isthe same as every year: how do we replace products that have become obsolete with new ones in emerging markets and applications? It’s crucial to identify and partner with the companies that are going to succeed.
Nick Leonardi, Premier Semiconductor Services
With visibility to ODMs, distributors, EMS providers, and OEMs, Premier has the opportunity to work with many different technologies. Among those that we view as more significant include the progress made within the CSP arena and the continued miniaturization of components. The markets with the greatest growth opportunity within advanced packaging will be in computer, commercial-hand-held, medical and military products.
As a predominantly domestic provider of outsourced test and final manufacturing services, Premier continues to “buck the trend” for companies to move product overseas. Also, it will remain a challenge to assist our customers with the ever-increasing counterfeit contamination of the supply chain.
Simon Leow, Icon Technologies
In 2007, Icon Technologies developed upgrade options for companies’ customer bases.
We are very excited about prospects for 2008. It will be an even stronger year with Icon focusing on expanding our market into key development areas like Vietnam. In 2008 Icon will also introduce new development projects to include market-specific platforms including 3D chip sets and advanced technology for the cell phone market.
Paul Lindner, EV Group
One of last year’s most significant technological advancements in the advanced packaging sector has been growing interest in through-silicon vias (TSVs) for 3D packaging applications. EVG was an early pioneer in TSV, having worked in this area with Rensselaer Polytechnic Institute (RPI) and Massachusetts Institute of Technology (MIT) in the late 1990s. Last year, we parlayed this expertise into co-creation of the EMC-3D Consortium, chartered with driving implementation of a cost-effective TSV process for 3D chip stacking and MEMS integration. Currently, memory devices, CMOS image sensors and MEMS are pursuing use of TSV in next-generation packaging technology, especially for use in consumer products. Given that advanced packaging and MEMS are the two largest markets for our equipment, we believe this development bodes well for EVG.
Andy Mackie and Jordan Ross, Indium
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Performance requirements exceed the capabilities of standard greases and metal-filled epoxies. This requires thermal interface materials (TIMs) with significantly improved heat-flux capability, as well as heat- and heat-cycle-tolerance.
The ball-attach market will require no-clean flux materials, driven by process cost reduction and elimination of capital (cleaning) equipment costs. Residues may be considered acceptable, if they can meet certain performance and appearance criteria.
In direct chip-attach (DCA), cleaning under flip chips with clearances <100μm will be eliminated by moving to either a no-flow underfill material, or to a low residue no-clean flux. Indium is working with several manufacturers to develop a low-residue no-clean spray flux. There will also be a need for halide-free fluxes.
Ultra-fine solder pastes will be replaced by ultrafine “microspheres”: solder spheres from 50 to 300 μm in diameter. 3D packaging will drive new materials needs with interesting variations on old technologies, and in die-attach, the search for a low-cost lead-free alloy with a solidus >265°C will continue.
Mark Murdza, Antares Advanced Test Technologies
Technology advancements such as stacked packages and stacked die will affect our handling and socketing of thinner packages and WLPs. High-speed testing at the wafer level for the known good die (KGD) market will also drive technology convergence between wafer level and packaged-test consumables. The consumer marketplace will continue to grow, where leading-edge packages are incorporated first and reliability risks are accepted for improved performance. Previous-generation packages will also be incorporated into high-reliability environments. The combination of finer pitch and exaggerated pattern variability in package terminals is eliminating standardization. Absence of a single standard lead-free solution and resulting performance variability poses a challenge. Price cutting will compromise innovation and solutions for next-generation packages.
Neil O’Brien, Finetech
The continuous implementation of complex packaging philosophies such as incorporation of PoP, 01-005, and multiple RF shields within small profile devices pushes vendors to go beyond “just-rework” into strict thermal management regimes. Things are only getting smaller, tighter, and more 3D integrated.
Growth in the optoelectronic packaging marketplace inspired Finetech to develop its fully automatic, sub-micron bonder “FEMTO”. This allows customers to increase yield by decreasing operator intervention. The ease of use and flexibility will still appeal to the R&D/prototype market, and allows for work at the larger wafer level.
Finetech specializes in solving unique packaging needs through custom systems and tooling. Our package-on-package (POP) solutions continue to evolve. The challenge for Finetech is to continue to educate the market about our unique capabilities.
Heinz Oyrer, SEZ Group
The advances made in 2007 in TSV technology are worth noting. With TSV, there isn’t a technical issue, but there is a business issue – such as cost – that has affected adoption. So, it will be interesting to hear how the debate on TSV’s cost effectiveness plays out.
Wafer-level packaging (WLP) for 300 mm will be the largest growth area in 2008. There will be some growth in solder bump, and potentially gold bump, but mostly it will be in WLP.
Following the introduction of a dual-use (BEOL and FEOL) solution, the Da Vinci Prime, SEZ’s next challenge will be to provide a single-wafer wet cleaning, etching, and stripping solution directly geared for bumping and wafer-level chip-scale packaging.
Han Park, NEC Electronics America, Inc.
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NEC Electronics sees strong growth potential for flip-chip BGA (FCBGA) solutions and has developed an ultra-thin package based on flip-chip technology to meet the heightened design requirements of cellular phone applications. Current game console devices use a flip-chip system-in-package (SiP), and continuing expansion in that market should drive flip-chip growth in 2008.
Consumer AV products will continue to gain strength, with corresponding growth anticipated for the plastic BGA packages used in them. The increasing demand and rapid product cycles of cellular phones and digital still cameras should drive the growth of SiP and thin package-on-package (PoP) solutions.
The key challenge in 2008 will be the issue of power dissipation in stacked-chip SiPs, PoPs, and side-by-side SiPs. Wire-bonded and flip chip side-by-side SiPs are better for managing the thermal issue than stacked. NEC Electronics is currently working to develop lower-power chip solutions and advanced packaging technologies to meet these requirements.
Delphine Perrotet, Xsil
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One of the major trends that impacts silicon micro-machining is the increasing percentage of wafers being thinned. Another important technological advancement is TSVs for 3D interconnects.
FLASH memory is one market that will show the most growth next year – in terms of the challenges being overcome. Memory manufacturers tend to increase the capacity of FLASH, without increasing size, which is a driver on the production of thin wafers.
In 2008, we plan to increase the machining speed of our laser-based dicing system, specially designed for handling and dicing silicon wafers below 100 µm, and thus decrease the cost-of-ownership, while maintaining quality.
For TSVs, XSiL is launching a laser drilling system that offers increased drilling rates while providing enhanced compatibility with downstream via processes.
Dick Post, NEXX Systems
In 2007, electrodeposition of Cu for filling high-aspect ratio TSVs moved from R&D into pilot production, made possible by advances in process performance and cost reduction.
With regard to growing markets in 2008, David Hayes, Amkor, reports that the mobile phone industry is consuming 35% of worldwide demand for wafer bumping. The existing infrastructure and accelerating demand for mobile devices that are thinner and lighter are driving industry-wide adoption of wafer-level packaging for low I/O die.
The challenge for NEXX Systems will be in developing economical processes for new packaging technologies, such as Cu pillars and TSVs, that justify the performance advantage these technologies offer.
Reinhart Richter, Multitest elektronische Systeme GmbH
In 2007, significant technological advancements impacting final test included lead-free/green ICs reaching full production; I/O pitches of 0.4 mm, and in some cases 0.3 mm; and QFN packages in sizes of 2 mm × 2 mm or less, with thicknesses down to 0.5mm. Additionally, 2007 is the first year where advanced motion sensor devices reached volume production for consumer applications.
For 2008 the advancement of MEMS sensor devices in automotive, industrial, and consumer applications is expected to grow stronger than other applications. This will have a big impact on the IC equipment industry: shorter and steeper cycles force suppliers to optimize their supply and manufacturing chains, ever-changing package types and form factors with smaller lots will enforce more flexible manufacturing systems. Smaller packages with finer I/O pitches will challenge mechanical device handling.
Rajiv Roy, Rudolph Technologies, Inc.
Surely the most significant trend in semiconductor packaging is the tremendous growth in multiple chip packaging, including everything from wire-bonded stacked die to 3D ICs with through silicon vias (TSVs). This growth is driven by demands for smaller form factors, higher performance and multiple functions across applications ranging from handheld devices and mobile electronics to high speed computers. New and emerging processes bring new requirements for measurement and control: bond pad inspection, wafer thinning and bonding, deep silicon etching, and more. Our challenge at Rudolph is to anticipate these needs and provide cost-effective, production-worthy solutions.
Matt Souter, Tamarack Scientific
A significant technological advancement in 2007 was the use of excimer laser ablation to remove thin layers of metal and dielectrics. This direct removal process greatly reduces the cost of manufacturing.
In 2008, we expect there to be significant growth in the markets for MEMS and 3D packaging. At Tamarack Scientific, the challenges involve understanding what semiconductor fabs perceive to be the next UV imaging or laser ablation specification requirement. It’s necessary to begin developing this type of technology in advance of the production need. And it is difficult to obtain this information. In addition, companies like ours have to forecast, and getting forecasts from our customers can also be difficult.
What challenges do you foresee for your company in 2008?
Ming Sun, Ph.D., Alpha and Omega Semiconductor
The most significant technological advancements in 2007 have been in 3D packaging, finally breaking through the cost barrier to compete with traditional packages, in addition to product performance. Our analog products are going toward further integration of chips and discrete components using various advanced process technologies and designs. Demands for performance, minimization and low cost, which can be achieved through more compact structure, more cost effective process technology, new materials and high volume production, are the three largest drivers for our products growth in 2008.
However, thermal performance and product reliability of 3D packaging of multiple chips and discrete components become the biggest challenges to the success of new product development. The 3D interface co-design and the best matching materials development require a super engineer, with strong mechanical, material, chemical, and electrical background.
Dietrich Tönnies, SUSS MicroTec
Along with MEMS, SiP, 3D packaging, and WLP of CMOS image sensors have been important technology driver in 2007. These last three are early adopters of TSV’s, and require 3D component integration.
Therefore, the need for redistribution layers (RDL) at wafer level will increase because I/O terminals need to be rerouted to match their layout on the two bond faces of the two (or more) dice that are to be vertically interconnected. RDL layers often have to be realized on the wafer backside, which requires lithography tools with specialized bottomside-alignment (BSA) systems. Generally, micro solder bumping, gold bumping and RDL technology will benefit from more precise alignment technologies available on mask aligners. Large-diameter TSVs require conformal coating of organic insulation or photoresist layers. SUSS’s spray coating technology is production-ready for tapered TSVs. The conformal coating of vertical TSVs will be the next challenge.
Patrick Trippel, the electronics group of Henkel
In Henkel’s view, the continued advancement of stacked die and 3D packaging tops the list. Successful die thinning to 50 µm has been achieved, with 25 µm on the horizon. In addition, PoP technology has moved forward.
Smaller, faster, cheaper has been the continuous call, and it isn’t expected to change. What have changed are device footprints and the functionality that will be packed into modern packages. To achieve the performance required, novel materials technology must be developed. The extension of stacked-die technology into leadframe packages will present profound thermal challenges. Die-attach materials must be formulated to address the excess heat generation and solder-based die-attach products are emerging as the best alternative. Additionally, mold compounds must be designed to compensate for warpage caused by thermal issues. Having anticipated this technology shift, Henkel already has market-ready solutions.
Oskar Wack, ZESTRON
Unique product and process requirements for local markets demand new product technologies and special technical support skills. ZESTRON’s R&D department has already started to address the new cleaning challenges with the innovative solutions. The increased demand for our Asia Pacific customer has prompted us to relocate to a larger facility in Shanghai, China. Additionally, ZESTRON Europe will be completing the construction of a state-of-the-art building in 2008 to better support our local customer base, especially in Eastern Europe. These facilities will continue to present a unique opportunity to customers to specify their respective cleaning process. Numerous spray-in-air batch and inline processes will be available.
Paul Walter, Dage Precision Industries
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Semiconductor packaging continues to gravitate toward stacked die devices. These 3D packages typically contain more bumped devices as semiconductor suppliers’ move away from wire bonding. The growing functionality of handheld products continues to drive the use of SiP devices.
A challenging area of package inspection is the detection of interfacial voids and plating issues within microvias. These defects can be determined with computerized tomography making it an ideal inspection methodology for BGA substrates and packages. Additionally, the increased use of lead-free solder in portable products makes them susceptible to brittle fracture failures when subjected to mechanical shock. High-speed bondtesting can be used as an indicator of drop test performance.
Our biggest challenge is to maintain our investment in R&D so we can continue to deliver technology that meets our customer’s x-ray and bondtesting inspection needs for smaller bumped device structures.
Martin Ziehbrunner, Essemtec AG
Due to worldwide local sales and service support and new machines, further growth in most areas worldwide can be predicted. The fourth assembly hall will be added to our Switzerland headquarters and our development team will be further expanded. The focus on highly flexible production machines will challenge us to offer the right equipment especially for areas like North America or Europe where mass production has moved away.
