Okmetic, the supplier of advanced silicon wafers for the manufacture of MEMS, sensor, RF and power devices, today announced the release of Terrace Free SOI capability for its 200mm Bonded Silicon-On-Insulator BSOI and E-SOI wafers.
The Terrace Free SOI wafers provide device manufacturers with maximized usable area and enable more chips per wafer to be produced. The standard SOI terrace (non-SOI area) is ≤ 2 mm so the Terrace Free SOI wafers provide a prominent, ca. 4%, increase in the active area. Also, the Fixed Quality Area (FQA) increases by ca. 3% as a result of edge exclusion area decrease from 4.5 mm to 3.0 mm.
The Terrace Free SOI wafers’ edge is beveled into optimal shape to enhance compatibility with subsequent device processing. Terrace Free SOI wafers can e.g. facilitate wafer clamping and handling as well as epitaxial growth and lithography process including resist coating.
“Okmetic’s motivation to develop Terrace Free SOI wafers was to meet the customer and industry needs. To be able to manufacture a fully Terrace Free SOI wafer, Okmetic needed to develop a new kind of optimized version of the established SOI process. Okmetic is very pleased of being able to collaborate with several pilot customers in the development phase. These customers gave valuable feedback on the Terrace Free SOI wafer prototypes, which has enabled more rapid development phase and made the subsequent production ramp-up successful. Upon the launch of this Terrace Free SOI capability, Okmetic is now ready to provide samples and start volume deliveries for a wider audience”, says Atte Haapalinna, Chief Technology Officer at Okmetic.
Terrace Free SOI capability is available for 200mm Bonded Silicon-On-Insulator BSOI and E-SOI wafers, which provide an optimal platform for the manufacture of MEMS, RF and power devices.
