JEDEC Solid State Technology Association today announced that its JC-15 Committee for Thermal Characterization Techniques for Semiconductor Packages welcomes interested companies to join JEDEC and participate in committee meetings and activities. Near-term plans for the committee include the evolution of standards that cover the provision of electronic thermal models in neutral file formats (e.g. JEP181, JEP30 T101), as well as the review and improvement of several key standards previously developed by the committee. For more information about JC-15 activities and JEDEC membership visit the JEDEC website.
Activities within JC-15’s scope include the standardization of thermal characterization techniques, both testing and modeling, for electronic packages, components, and materials for semiconductor devices.
“The activities of JC-15 reflect JEDEC’s commitment to evolving alongside the dynamic microelectronics industry,” said Robin Bornoff, Acting Chair of the JC-15 Committee. He added, “The wide range of subjects covered by JC-15 standards provides our members with diverse opportunities to contribute their knowledge and expertise to further enhance the efficacy of the electronics thermal supply chain.”
