Silvaco Japan Co., Ltd. today announced that Pioneer Micro Technology Corp. (PMT) has begun providing a Process Development Kit (PDK) for Silvaco tool users targeting the manufacture of IC designs in PMT’s 0.35 µm CMOS process technology.
PMT delivers its innovative semiconductor technology using a six-inch (150 mm) silicon wafer process. Flexible combinations of different power supply voltages are possible for each of the available CMOS, Bipolar and BiCMOS processes.
The new PDK provided by PMT enables a complete design environment for its 0.35 µm process for customers using Silvaco EDA solutions. The PDK includes:
- Symbols for the Gateway schematic editor
- SPICE models that support the SmartSpice circuit simulator
- Technology files for P-Cell and the Expert layout editor
- Rules files for the DRC and LVS physical verification tool Guardian
- Rules files for the Hipex parasitic extraction tool
Kunihisa Ishii, Process Engineer Section Manager at Pioneer Micro Technology, said, “More customers will be able to use our six-inch silicon foundry with our new 0.35 µm CMOS PDK for Silvaco custom design tools. With our partnership with Silvaco, who have a lot of experience in analog custom design solutions, we will reduce total development costs for our customers and extend our flexible foundry services.”
Naoto Kameda, General Manager of Silvaco Japan, said, “We are very happy that the Silvaco PDK is now available from Pioneer Micro Technology. Their unique silicon process allows integrating photodiode, bipolar elements, and CMOS circuit into one optoelectronic chip. Silvaco EDA design solution promises a rapid start to the development of new high-end optical sensor solutions for PMT customers.”
