ACM Research, Inc. (ACM) (NASDAQ: ACMR), a leading supplier of wafer processing solutions for semiconductor and advanced wafer-level packaging (WLP) applications, today introduced its high-speed copper (Cu) plating technology, which is now available for its ECP ap system. The tool supports Cu pillar bumping for Cu, nickel (Ni) and tin-silver (SnAg) plating; solder bumping Ni and SnAg plating; and high-density fan-out (HDFO) WLP products’ warpage wafers, with Cu, Ni, SnAg and gold plating. The new high-speed plating technology supports the Cu plating chamber with stronger mass transfer during the plating process.
ACM upgraded an existing customer’s ECP ap system with this new high-speed plating technology in December 2020, and has received an order for the first system equipped with the high-speed plating technology which it expects to ship to a major outsourced assembly and test (OSAT) facility in China later this month.
According to Mordor Intelligence, the fan-out packaging market is expected to witness a compound annual growth rate (CAGR) of 18% during the forecasted period (2021 – 2026). It reports that fan-out technologies’ prevalence is mainly due to cost, reliability and customer adoption. Approximately more than 20% thinner than traditional flip-chip assembly, fan-out packaging is supplementing the slim profile trend of smartphones.1
“One of the major challenges in 3D plating applications is to plate metal film in deep vias or troughs, which have a depth of more than 200 microns, at high speed and with better uniformity,” said Dr. David Wang, ACM’s Chief Executive Officer and President. “Historically, performing copper plating for pillars at high plating rates encountered mass transport limitations that reduced the deposition rate and generated an uneven top profile of the pillar. Our new high-speed plating technology solves the mass transfer challenge while achieving a better pillar top profile and delivering improved height uniformity at a higher throughput.”
ACM’s high-speed plating technology can enhance the mass transfer of Cu ions during Cu film deposition, at the same time coating all pillars on the entire wafer at the same plating rate. This allows for better uniformity within wafer and within die during high-speed plating. Wafers processed using this technology achieve wafer-level uniformity below 3%, an improvement over other approaches’ performance at the same plating rate. It also offers better coplanarity performance and higher throughput.
