ACM Research, Inc., a supplier of wafer processing solutions for semiconductor and advanced wafer-level packaging applications, today announced its new Panel Electrochemical Plating (Ultra ECP ap-p) tool designed for fan-out panel-level packaging (FOPLP). This new tool employs a horizontal plating approach achieving superior uniformity and precision across the entire panel.
“As demands for low latency, high bandwidth and cost-efficiency in semiconductor chips intensify, advanced packaging technologies like FOPLP are becoming increasingly critical,” said Dr. David Wang, ACM’s President and Chief Executive Officer. “FOPLP, with its capability to facilitate high-density, high bandwidth chip-to-chip connections, offers substantial growth prospects. The Ultra ECP ap-p tool is the first in the world to employ horizontal plating for panel applications, drawing upon ACM’s deep-rooted expertise in wafer plating and copper processes. We believe the tool will revolutionize the market, enabling advanced packaging with sub-micron features on large panels, which are especially applicable to GPUs and high-density high bandwidth memory (HBM).”
The Ultra ECP ap-p tool supports 515mm x 510mm panel sizes, with an option to expand to 600mm x 600mm. It is compatible with both organic and glass substrates and includes capabilities for copper (Cu) via filling, Cu pillar, nickel (Ni), tin-silver (SnAg) plating, and solder bumping. It accommodates high-density fan-out (HDFO) products requiring Cu, Ni, SnAg and gold plating.
ACM’s proprietary technology optimizes the management of electrical fields, ensuring consistent and uniform plating across the panel. The horizontal configuration of the tool significantly reduces the risk of cross-contamination between baths, enhancing control and cleanliness, crucial for producing large panels with sub-micron redistribution layers (RDLs) and micro-pillars.
The Ultra ECP ap-p tool incorporates advanced automation features that enhance efficiency and quality control throughout the manufacturing process. This automation not only mirrors traditional wafer processing steps. but also adapts them for larger and heavier panels, including critical operations like panel flipping for correct orientation and face-down plating.
