When used in combination with a patternable metal such as Ru, semi-damascene promises to be RC, area, cost and power efficient – offering an interconnect scaling path.
Tackling Network-on-Chip (NoC) Scaling Challenges with a System-technology Co-optimization Approach
Co-integration of NoC routing channels alongside the backside power delivery network: a scalable and cost-effective approach.
Ion Beam Technology – Enabling the Ever-evolving Mobile Communications Landscape
Ion beam technology ensures that today’s mobile networks remain robust and efficient, paving the way for future innovations in the ever-evolving landscape of mobile communications.
Leveraging Visual Data Science in the Semiconductor Manufacturing Industry
“Data, data everywhere.. what am I to think?” This riff on the Rime of the Ancient Mariner may well be the lament of every engineer in the semiconductor industry who feels as if they are drowning in data. Fortunately, new tools are now available that can help.
Apple Is America’s Semiconductor Problem
If Apple wants to source its chips for pennies from foreign suppliers, it should have to pay a price to do so, such as a duty on imported iPhones using only foreign-sourced chips. Realizing the promise of the CHIPS Act depends on acknowledging and addressing Apple’s outsized influence over our domestic chip industry.
MEMS Industry: Poised for a Resilient Comeback?
Despite challenges, the MEMS industry is set for robust growth and technological advancements.
CMOS Image Sensor Industry: A Growing Market with Evolving Technologies
Technological advancements and market dynamics propel the CIS industry forward.
System-Level Simulations, Sub-System Digital Twins, 2.5D Heterogeneous Integration, UCIe and CMOS 2.0
Chip design simulation remains an important tool, but manufacturing and supply chain simulators are equally critical – e.g., digital twins and chiplets. Die hardware integration security looks to be the new threat target for modern systems, and CMOS 2.0 may make the challenge even more significant.
How Etch Breakthroughs Are Tackling 3D NAND Scaling Challenges on the Path to 1,000 Layers
As the industry now looks towards the 1,000-layer roadmap by the end of decade or soon thereafter, there are some critical challenges. Lam is working actively with leading customers to address these in time through innovations in etch, as well as other advanced manufacturing processing steps.
Power SiC WFE Market: Yole Group Forecasts the CapEx Trend
With multiple investments announced by players, the Power SiC wafer front-end equipment market will peak at $5 billion in 2026. Besides the strong growth in the tool market, there are some concerns about future over-capacity and manufacturing challenges for technology transition.
