Cadence Design Systems, Inc. announced today an expanded collaboration with TSMC and Microsoft, focusing on accelerating the physical verification of giga-scale digital designs. Through this latest collaboration, mutual customers can shorten design schedules and reduce compute costs by adopting the Cadence Pegasus Physical Verification System and TSMC technologies, leveraging the ready-to-use Cadence CloudBurst Platform and Microsoft Azure cloud.
Executing physical verification on large digital designs traditionally consumes significant compute resources for long periods of time—up to days—while requiring high-performance machines with large, expensive physical memory. Given that physical verification is one of the final tasks prior to tapeout, designers are under extreme pressure to meet aggressive design schedules and compute budgets.
The Cadence Pegasus Verification System was built from the ground up for massively distributed implementation on-premises and in the cloud. The Pegasus Verification System’s FlexCompute technology provides dynamic, automated CPU management, saving users from having to specify exact CPU requirements. FlexCompute also optimizes CPU utilization, providing the optimal balance between turnaround time and cloud compute resources. Initial results demonstrated that the Pegasus Verification System in the cloud provided optimal performance and a 20% reduction in cloud compute costs.
“Driven by the constant push to meet consumer demands while coping with increasingly larger design sizes, design teams can look to the cloud to verify designs with flexible compute resources,” said Dan Kochpatcharin, head of the Design Infrastructure Management Division at TSMC. “Our continued collaboration with Cadence and Microsoft through the TSMC OIP Cloud Alliance has given our mutual customers fast, easy access to our advanced technologies and Cadence’s leading design solutions in a cloud environment running on Microsoft Azure. This collective effort lets customers manage giga-scale designs effectively, so they can achieve significant run-time speedup and bring differentiated products to market sooner, with higher quality.”
“Through our latest work with TSMC and Microsoft, we’ve continued to deliver innovations that help customers resolve their most pressing physical verification design challenges,” said Dr. Chin-Chi Teng, senior vice president and general manager of the Digital & Signoff Group at Cadence. “Using our Pegasus Verification System with its FlexCompute technologies and the ready-to-use CloudBurst environment with the Microsoft Azure cloud platform and TSMC’s technologies gives our customers the competitive edge they need to efficiently manage compute costs for time-sensitive chip design projects.”
Mujtaba Hamid, GM Modeling and Simulation at Microsoft Azure, added, “As leading-edge designs create new challenges for engineering teams, we continue to optimize the Microsoft Azure cloud for silicon development to meet the complex, variable infrastructure needs of our mutual customers, extending the limits of giga-scale designs. Our continued collaboration with the Cadence and TSMC teams further advances cost-effective silicon design signoff via the cloud, enabling engineers to meet their time-to-market challenges while managing advanced-node complexity.”
For more information on the expanded Cadence, TSMC and Microsoft collaboration, a new white paper is available for download at TSMC-Online at https://online.tsmc.com/online/. The white paper details the giga-scale strategy behind the Pegasus Verification System’s cloud execution model and includes a set of guidelines, sample scripts, detailed illustrations, the CloudBurst reference architecture and the Azure cloud IT best practices guidelines for optimizing cloud resources. In addition, TSMC, Microsoft and Cadence will deliver a presentation that highlights the collaboration at the upcoming CadenceLIVE Silicon Valley Conference taking place on April 19-20, 2023 in Santa Clara, Calif. Register at www.cadence.com/go/cadencelivesvpr.