PROPHESEE, the inventor of the world’s most advanced neuromorphic vision systems, joins the IRT Nanoelec consortium to help broaden the field of potential applications for 3D hybrid wafer-to-wafer bonding with fine interconnect pitches. 3D integration brings, under a single roof, expertise and equipment addressing the entire 3D integration value chain: technology, circuit architecture, EDA tools, packaging and test. STMicroelectronics (IDM), Mentor (EDA), a Siemens business, EVG and SET (equipment suppliers), and CEA-Leti (RTO) are the current members of the consortium. Among other successes, they have developed the first 3D stack imager at a 1.44µm pitch using wafer-to-wafer direct hybrid technology.
Packaging
Growth of Near Field Communication (NFC) Chips Market to Be Impacted by the Increasing Demand for Smart Parking
The report, NFC chips market 2019-2023, has been added to Technavio’s catalog. It provides a comprehensive analysis of the market, including its global and regional market share as well as market segmentation based on product (smartphones, smart wearables, POS terminals, and others) and geography (APAC, Americas, and EMEA) for the forecast period 2019-2023.
2019 Microprocessor Slump Snaps Nine Years of Record Sales
The microprocessor market’s string of nine straight record-high annual sales between 2010 and 2018 is expected to end this year with worldwide MPU revenue dropping 4% to about $77.3 billion because of weakness in smartphone shipments, excess inventories in data center computers, and the global fallout from the U.S.-China trade war, according to IC Insights’ recently updated forecast.
GLOBALFOUNDRIES Qualifies Synopsys Fusion Design Platform on 12LP FinFET Platform
Synopsys, Inc. (Nasdaq: SNPS) today announced that GLOBALFOUNDRIES® (GF®) has qualified Synopsys’ Fusion Design Platform™ for its 12-nanometer (nm) Leading-Performance (12LP) FinFET platform. Optimized for the high-performance and low-power requirements of artificial intelligence (AI), cloud computing, and mobile system-on-chips (SoCs), the production-ready flow is based on the silicon-proven RTL-to-GDSII 12LP foundry reference flow and incorporates Synopsys Advanced Fusion technologies for best quality-of-results (QoR) and time-to-results (TTR) in FinFET designs.
2019 Heterogeneous Integration Roadmap Released; Identifies Long-Term Technology Requirements to Speed Innovation
SEMI, the global industry association representing the electronics design and manufacturing supply chain, today announced the 2019 release of the Heterogeneous Integration Roadmap (HIR). Designed to stimulate pre-competitive collaboration in order to advance heterogenous integration technology development and accelerate electronics innovation, HIR provides a long-term vision for the electronics industry, identifying future technology requirements and potential solutions. SEMI is among five HIR sponsors. SEMI members across the global electronics supply chain integrate separately manufactured components into assemblies to enhance electronics system functionality across a multitude of applications.
New Approach For Modern Power Grids That Increases Efficiency, Reduces Cost
Modern power grids are rapidly developing due to the increasing penetration of renewable energy sources such as solar photovoltaic and wind power. This trend is expected to rise in the near future, as attested by major countries worldwide in their commitments to the production of large renewable power penetration. A modern power grid, with its reduced dependence on non-renewable energy, has indisputable advantages in terms of environmental safeguards, but its introduction does not come without a cost.
MIPI Alliance Advances Activities for ADAS, ADS and Other Automotive Applications
The MIPI Alliance, an international organization that develops interface specifications for mobile and mobile-influenced industries, today announced key advancements and activities designed to enhance advanced driver assistance systems (ADAS), autonomous driving systems (ADS) and other automotive applications. Trends such as the proliferation of camera, display, radar, lidar and other sensors are creating growing demand for high-performance wired interfaces in vehicles. While drawing on its existing specifications for mobile devices, MIPI is developing and enhancing automotive specifications to meet the stringent requirements of automotive OEMs, Tier 1 suppliers, SoC designers and other industry providers in areas such as reliability, functional safety and low electromagnetic interference (EMI).
Synopsys Announces Industry-First Unified Functional Safety Verification Solution to Accelerate Time-to-Certification for IPs and SoCs
Synopsys, Inc. (Nasdaq: SNPS) today announced the industry’s first and most comprehensive unified functional safety verification solution to accelerate time to ISO 26262 certification for automotive IP and semiconductor companies targeting the highest Automotive Safety Integrity Levels (ASIL D). As part of the solution, Synopsys introduced VC Functional Safety Manager, a FMEA/FMEDA and fault classification automation technology enabling architects, IP designers, and verification engineers to accelerate their functional safety verification with productivity gains up to 50 percent compared to traditional manual and error-prone functional safety verification point tools.
Groundbreaking Method Detects Defective Computer Chips
Guaranteeing that computer chips, that can consist of billions of interconnected transistors, are manufactured without defects is a challenge. But how to determine if a chip is compromised? Now a technique co-developed by researchers at the Paul Scherer Institut in Switzerland and researchers at the USC Viterbi School of Engineering would allow companies and other organizations to non-destructively scan chips to ensure that they haven’t been altered and that they are manufactured to design specifications without error.
2019 IEEE International Electron Devices Meeting to Shine the Spotlight on the Latest Advances in Semiconductors and Related Technologies
“Innovative Devices for an Era of Connected Intelligence” is the theme of the upcoming 2019 IEEE International Electron Devices Meeting (December 7-11, 2019), chosen to reflect the conference’s focus this year on the processors, memories, 3D architectures, power devices, quantum computing concepts and other technologies needed to drive diverse new applications of electronics technology forward. The 65th annual IEDM will feature a technical program of 238 papers given by many of the world’s top scientists and engineers in the field. It will be preceded by a series of 90-minute tutorials on Saturday, Dec. 7, and by day-long short courses on Sunday, Dec. 8.
