It’s well known that electronics games buffs like their image creation as realistic (or at least as cinema-like) as possible, which in image-processing terms means handling more and more fine-grained pixel data as fast as possible. That means more and more stream processors and texture units in the graphics processor to handle parallel data streams, and faster and faster memory to funnel the data in and out of the GPU.…
Siliconica
Samsung’s 3x DDR3 SDRAM – 4F2 or 6F2? You Be the Judge..
We recently acquired Samsung’s latest DDR3 SDRAM, allegedly a 3x-nm part. When we did a little research, we found that the package markings K4B2G0846D-HCH9 lined up with a press release from Samsung last year about their 2 Gb 3x-nm generation DRAMs. My colleague at Chipworks, Randy Torrance, popped the lid to take a look, and drafted the following discussion (which, amongst other things, raises the perennial question for us reverse…
Common Platform Goes Gate-Last – at Last!
At the IBM/GLOBALFOUNDRIES/Samsung Common Platform Technology Forum on Tuesday, Gary Patton of IBM announced that the Platform would be moving to a gate-last high-k, metal-gate (HKMG) technology at the 20-nm node. At the 45- and 32-nm nodes there has been a dichotomy between gate-last as embodied by Intel, TSMC, and UMC, and gate-first, promoted by the Common Platform and others such as Panasonic. (Though, to be realistic, Intel’s is the…
Common Platform Goes Gate-Last – at Last!
At the IBM/GLOBALFOUNDRIES/Samsung Common Platform Technology Forum on Tuesday, Gary Patton of IBM announced that the Platform would be moving to a gate-last high-k, metal-gate (HKMG) technology at the 20-nm node. At the 45- and 32-nm nodes there has been a dichotomy between gate-last as embodied by Intel, TSMC, and UMC, and gate-first, promoted by the Common Platform and others such as Panasonic. (Though, to be realistic, Intel’s is the…
IEDM 2010 Retrospective – Part 1
The International Electron Devices Meeting started its 56th session last week on Sunday in San Francisco. This year the program appears to more academic than in previous years, and this was confirmed by the conference chair in his opening address – only 145 submissions out of a total of 555, an all-time low as a percentage. Attendance was guesstimated at ~1500, again lower than earlier years on the west coast.…
IEDM Next Week!
Next Sunday the great and the good of the electron device world will be gathering in San Francisco for the 2010 IEEE International Electron Devices Meeting. To quote the conference web front page, “IEDM has been the world’s main forum for reporting breakthroughs in technology, design, manufacturing, physics and the modeling of semiconductors and other electronic devices.” From my perspective at Chipworks, focused on chips that have made it to…
TI Ships 40-µm Fine Pitch Copper Pillar Flip Chip Packages
The week before Semicon West, Texas Instruments and Amkor released a joint announcement that they were shipping parts in fine pitch copper pillar packages. Mark Lapedus at EETimes picked the story up and added the detail that the latest OMAP processors were going out in this format. By coincidence, Chipworks had just finished analysing TI’s Sitara AM3715, a 45-nm applications processor with a 1-GHz ARM Cortex-A8 core and a POWERVR…
Non-Intel HKMG Coming Soon? And 45LP Makes the Mainstream in Mobiles
The last few weeks have seen some announcements that finally seem to show that HKMG (high-k, metal-gate) processes other than Intel are coming into the real world. First, on September 7, Samsung showed off an engineering sample of their 32-nm Saratoga chip at their Mobile Solutions forum. A week later on the 15th, Panasonic declared that in October they would be shipping 32-nm HKMG chips for use in Blu-ray disc…
Samsung’s Eight-Stack Flash Shows up in Apple’s iPhone 4
Back in 2005 Samsung made an announcement that they would be shipping eight die stacked in the same package. At the time it seemed remarkable, but we didn’t see it any time soon after that, so it got lost in the noise of other package developments and the increasing TSV (through-silicon vias) hype. Last year we commented, in the now defunct Semiconductor International, on a 16GB Sandisk Micro-SD flash card…
Winbond Adopts Qimonda’s Buried Wordline Technology – Metal Gates Come to DRAMs
Before Qimonda’s unfortunate demise last year, they delivered an impressive paper at IEDM 2008 [1] describing a “buried wordline” (BwL) DRAM stack-cell structure. This was a marked change from their earlier technology, as until this point all of their product had been based on planar wordline structure with trench-style storage capacitors sunk into the die substrate. Even when we compare BwL-stack with conventional stack DRAM structures, there’s a major shift,…
