In the last couple of years there have been announcements that Intel will be acting as a foundry for FPGA company Achronix, PLD maker Tabula and programmable network processor provider Netronome, as well as much speculation about making chips for Apple. All these reports refer to using Intel’s leading-edge 22-nm tri-gate process. However, at CES a couple of weeks ago, my eye was caught by a 200-mm wafer on display…
Siliconica
IBM surprises with 22nm details at IEDM
Monday afternoon at the 2012 IEEE International Electron Devices Meeting, IBM discussed their 22nm SOI high-performance technology [1], aimed at servers and high-end SoC products. To an extent, this is an extension of the 32nm process, using epitaxial SiGe for the PMOS channels and stress, and dual-stress liners for both NMOS and PMOS strain. However, there were a couple of surprises buried in there — at least for me! The…
IBM surprises with 22nm details at IEDM
Monday afternoon at the 2012 IEEE International Electron Devices Meeting, IBM discussed their 22nm SOI high-performance technology [1], aimed at servers and high-end SoC products. To an extent, this is an extension of the 32nm process, using epitaxial SiGe for the PMOS channels and stress, and dual-stress liners for both NMOS and PMOS strain. However, there were a couple of surprises buried in there — at least for me! The…
Intel details 22nm trigate SoC process at IEDM
After launching their 22nm tri-gate high-performance logic product back in the spring, Intel have been promising to show off their SoC derivative, and yesterday was the day at the 2012 IEEE International Electron Devices Meeting. [1] As you can see from Table 1, we now have six transistor options; the high-voltage transistors use a thicker gate dielectric stack (Fig. 1), and the gate pitch and gate lengths have been tuned…
Intel details 22nm trigate SoC process at IEDM
After launching their 22nm tri-gate high-performance logic product back in the spring, Intel have been promising to show off their SoC derivative, and yesterday was the day at the 2012 IEEE International Electron Devices Meeting. [1] As you can see from Table 1, we now have six transistor options; the high-voltage transistors use a thicker gate dielectric stack (Fig. 1), and the gate pitch and gate lengths have been tuned…
Intel details 22nm trigate SoC process at IEDM
After launching their 22nm tri-gate high-performance logic product back in the spring, Intel have been promising to show off their SoC derivative, and yesterday was the day at the 2012 IEEE International Electron Devices Meeting. [1] As you can see from Table 1, we now have six transistor options; the high-voltage transistors use a thicker gate dielectric stack (Fig. 1), and the gate pitch and gate lengths have been tuned…
GlobalFoundries takes on Intel with 14nm finFET “eXtreme Mobility” process
A week after Intel were claiming that their 14nm process will be ready to go at the end of next year, GLOBALFOUNDRIES (GF) announced that they will have a 14nm finFET process for launch in 2014. Unfortunately they timed it to coincide with the iPhone 5, so we at Chipworks were tied up for a few days tearing it down. However, I don’t want to ignore this development — it…
The Elephant Has Left the Room – 450 mm is a Go!
It’s the day before Semicon opens up, and we have had a slew of announcements on 450 mm, the biggest of which was the joint ASML/Intel notice that Intel will be taking a share of ASML as a way of funding 450 mm and EUV R&D. Simultaneously imec released that the Flemish government would invest in their upcoming 450-mm facility, and imec and KLA-Tencor declared that a 450-mm capable SP3…
Sony’s PS Vita Uses Chip-on-Chip SiP – 3D, but not 3D
At the tail end of last year Sony released their PlayStation Vita, and it was duly torn down by iFixit and others. In due course we took it apart too, though we didn’t post it on our teardown blog. Sony CXD5315GG in the PlaySation Vita Inside we found the usual set of wireless chips, motion sensors, and memory, but the key to the increased performance of the PS Vita is…
Sony’s PS Vita Uses Chip-on-Chip SiP – 3D, but not 3D
At the tail end of last year Sony released their PlayStation Vita, and it was duly torn down by iFixit and others. In due course we took it apart too, though we didn’t post it on our teardown blog. Sony CXD5315GG in the PlaySation Vita Inside we found the usual set of wireless chips, motion sensors, and memory, but the key to the increased performance of the PS Vita is…
