The global IoT market is poised for explosive growth. By 2020, the market is expected to soar to $7.1 trillion. This infographic, courtesy of Jabil, gives an good overview of what will be connected (even garbage bins!).
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The Second Shoe Drops – Now We Have the Samsung V-NAND Flash
By Dick James, Senior Technology Analyst, Chipworks Two weeks ago, we posted about the TSMC 20nm product that we had in-house; now after waiting for a year since Samsung’s announcement of V-NAND production, we have that in the lab and can start to see what it looks like. The vertical flash was first released in an enterprise solid-state drive (SSD) last year, in 960 GB and 480 GB versions, but with no model…
The Second Shoe Drops – Now We Have the Samsung V-NAND Flash
By Dick James, Senior Technology Analyst, Chipworks Two weeks ago, we posted about the TSMC 20nm product that we had in-house; now after waiting for a year since Samsung’s announcement of V-NAND production, we have that in the lab and can start to see what it looks like. The vertical flash was first released in an enterprise solid-state drive (SSD) last year, in 960 GB and 480 GB versions, but with no model…
Chasing IC Yield when Every Atom Counts
Increasing fab costs coming for inspection and metrology At SEMICON West this year in Thursday morning’s Yield Breakfast sponsored by Entegris, top executives from Qualcomm, GlobalFoundries, and Applied Materials discussed the challenges to achieving profitable fab yield for atomic-scale devices (Figure source is the ITRS 2013 Yield Chapter). Due to the sensitive nature of the topic, recording was not allowed and copies of the presentations could not be shared. Qualcomm…
Moore’s Law is Dead – (Part 4) Why?
We forgot Moore merely meant that IC performance would always improve (Part 4 of 4) IC marketing must convince customers to design ICs into electronic products. In 1965, when Gordon Moore first told the world that IC component counts would double in each new product generation, the main competition for ICs was discrete chips. Moore needed a marketing tool to convince early customers to commit to using ICs, and the…
TSMC 20nm Arrives – The First Shoe Drops
By Dick James, Senior Technology Analyst, Chipworks For us at Chipworks interested in leading edge processes, 2014 so far has been the year of waiting for parts and processes that have been announced, but not shown up in the world of commercial production. It will surprise no-one in the business that they are Intel’s 14-nm, the 20-nm products from any of the big three foundries (in particular TSMC), and vertical…
TSMC 20nm Arrives – The First Shoe Drops
By Dick James, Senior Technology Analyst, Chipworks For us at Chipworks interested in leading edge processes, 2014 so far has been the year of waiting for parts and processes that have been announced, but not shown up in the world of commercial production. It will surprise no-one in the business that they are Intel’s 14-nm, the 20-nm products from any of the big three foundries (in particular TSMC), and vertical…
Moore’s Law is Dead – (Part 3) Where?
…we reach the atomic limits of device scaling. At ~4nm pitch we run out of room “at the bottom,” after patterning costs explode at 45nm pitch. Lead bongo player of physics Richard Feynman famously said, “There’s plenty of room at the bottom,” and in 1959 when the IC was invented a semiconductor device was composed of billions of atoms so it seemed that it would always be so. Today, however,…
Can we take cost out of technology scaling?
There is much talk these days about continued scaling, including some recent posts by my colleague Ed Korczynski, in “Moore’s Law is Dead” Part 1 (What?) and Part 2 (When?). At The ConFab in June, keynote speaker, Dr. Gary Patton, vice president, semiconductor research and development center at IBM, talked about scaling, adding some historical perspective. I previously blogged about the “three fundamental shifts” that Patton believes will lead to…
Moore’s Law is Dead – (Part 2) When?
…economics of lithography slow scaling. Moore’s Law had been on life support ever since the industry started needing Double-Patterning (DP) at 1/4-pitch of 193nm optical lithography. EUV lithography shows slow and steady progress in source and resist technologies, and ASML folks tell me that they now have a pellicle to protect the reflective masks, yet it remains in R&D. All other lithographic technologies under consideration—e-beam direct write, nano-imprint, directed self-assembly—can…