OpenFive, the provider of customizable, silicon-focused solutions with differentiated IP, today announced the launch of a Die-to-Die (D2D) PHY that complements the company’s existing D2D Controller to offer complete D2D interface solutions for various packages including substrates and interposers.
The new D2D PHY helps disaggregate large SoC die into smaller die, resulting in better yield, cost and power savings. It features up to 16Gbps NRZ signals with clock forwarding architecture. Each channel, comprising of 40 IOs, can provide effective throughput of up to ~1.75Tbps/mm. Users can stack up multiple channels to further increase overall throughput. The PHY also features built-in PLL, programmable output drivers, and link training state machines.
“The D2D subsystem, including both the controller and PHY, provides best-in-class latency, performance and power profile for various IO, CPU and analog chiplets,” said Ketan Mehta, Sr. Director, Product/Application Marketing, SoC IP, at OpenFive.
“OpenFive’s die-to-die connectivity IP solution will enable widespread integration of proven solutions from chiplet ecosystem partners,” said Mohit Gupta, SVP and GM SoC IP at OpenFive. “As a custom ASIC and IP provider, OpenFive is well-positioned to provide an entire chiplet solution to our customers at any stage of development, whether it be during design, integration, manufacturing, or testing of Known-Good-Die (KGD).”
