Rensselaer Professor Nikhil Koratkar and team find critical advances in nanostructures.
SEMI’s S23 Standard – Save Energy, Save Money, Save the Planet
The greatest potential for immediate reductions in GHG emissions in semiconductor manufacturing lies in reducing the energy used by manufacturing equipment.
Si2 Names Recipients of Annual Power of Partnerships Award
Technologists from Intel, IBM, Microsoft and Cadence Design Systems are this year’s Silicon Integration Initiative Power of Partnerships Award winners, recognizing the Si2 volunteer team with the most significant contributions to silicon-to-system implementation.
Samsung Begins Chip Production Using 3nm Process Technology with GAA Architecture
Optimized 3nm process achieves 45% reduced power usage, 23% improved performance, and 16% smaller surface area compared to 5nm process.
Breker Verification Systems Joins RISC-V International
Breker Verification Systems, a provider of advanced test content synthesis solutions, including RISC-V Cache Coherency and other SoC integration Verification Intellectual Property (VIP) in the “TrekApps” family, today joined RISC-V International (RVI) as a strategic member.
Renesas Partners with Tata to Accelerate Progress in Advanced Electronics for India and Emerging Markets
These joint endeavors extend the companies’ longstanding relationship as technology and business partners, including the recently announced next-generation EV Innovation Center (NEVIC) jointly established by Renesas and Tata Group’s Tata Elxsi in March 2022.
Advantest and Singapore Polytechnic Jointly Establish New Test Engineering Center
This is the first time that Advantest is collaborating with an Institute of Higher Learning (IHL) in Singapore.
Imec Shows Path to Line Resistance Halving using Semi-Damascene with High-Aspect-Ratio Processing
This week, at the 2022 IEEE International Interconnect Technology Conference (IITC 2022), imec, a world-leading research and innovation hub in nanoelectronics and digital technologies, presents options to reduce the metal line resistance at tight metal pitches, mitigating the resistance/capacitance (RC) increase of future interconnects using direct metal patterning.
Palomar Technologies places SST 5100 Vacuum Furnace at the EPIC-CENTRE-Torbay to Support Optoelectronics Packaging
Palomar Technologies announced the consignment of an SST 5100 Vacuum Reflow Furnace at the Electronics and Photonics Innovation Centre (EPIC) in Paignton, UK.
LEGO Stacking of 2D Materials Brings Us a Step Closer to Ultracompact Memory and Spintronic Technology
SUTD scientists designed a novel functional 2D hybrid material for ultracompact memory and spintronic device applications.
