Leti integrates everything

Now I know how wafers feel when moving through a fab. Leti in Grenoble, France does so much technology integration that in 2010 it opened a custom-developed people-mover to integrate cleanrooms (“Salles Blanches” in French) it calls a Liaison Blanc-Blanc…

Internet-of-Things Infographic

This infographic, courtesy of Jabil, gives an good overview of what will be connected to the internet by 2020 (even garbage bins!).

The Second Shoe Drops – Now We Have the Samsung V-NAND Flash

Two weeks ago, we posted about the TSMC 20nm product that we had in-house; now after waiting for a year since Samsung’s announcement of V-NAND production, we have that in the lab and can start to see what it looks like.

The Second Shoe Drops – Now We Have the Samsung V-NAND Flash

Two weeks ago, we posted about the TSMC 20nm product that we had in-house; now after waiting for a year since Samsung’s announcement of V-NAND production, we have that in the lab and can start to see what it looks like.

Chasing IC Yield when Every Atom Counts

Increasing fab costs coming for inspection and metrology At SEMICON West this year in Thursday morning’s Yield Breakfast sponsored by Entegris, top executives from Qualcomm, GlobalFoundries, and Applied Materials discussed the challenges to achieving profitable fab yield for atomic-scale devices…

Moore’s Law is Dead – (Part 4) Why?

We forgot Moore merely meant that IC performance would always improve (Part 4 of 4) IC marketing must convince customers to design ICs into electronic products. In 1965, when Gordon Moore first told the world that IC component counts would…

TSMC 20nm Arrives – The First Shoe Drops

For us at Chipworks interested in leading edge processes, 2014 so far has been the year of waiting for parts and processes that have been announced, but not shown up in the world of commercial production.

TSMC 20nm Arrives – The First Shoe Drops

For us at Chipworks interested in leading edge processes, 2014 so far has been the year of waiting for parts and processes that have been announced, but not shown up in the world of commercial production.

Moore’s Law is Dead – (Part 3) Where?

…we reach the atomic limits of device scaling. At ~4nm pitch we run out of room “at the bottom,” after patterning costs explode at 45nm pitch. Lead bongo player of physics Richard Feynman famously said, “There’s plenty of room at…

Can we take cost out of technology scaling?

At The ConFab, IBM’s Gary Patton spoke about the future of scaling and concluded that it we will continue scaling with new technology innovation, but we have to figure out how to drive the cost out.