Samsung Electronics Co., Ltd. today announced an expansion of its foundry ecosystem to offer a broader Intellectual Property (IP) portfolio for next-generation semiconductor design and production. Samsung’s foundry business has secured the support of leading IP providers to offer a wide range of IPs covering important market segments such as AI, GPU, HPC, automotive and mobile applications. The company expects greater access to a wide range of proven IP to enable faster and more effective System on Chip (SoC) implementation for customers.
The expanded IP ecosystem includes dozens of new IPs that are optimized for Samsung Foundry’s 3 to 8-nanometer processes.
“Samsung is actively pursuing the expansion of our cutting-edge IP portfolio, prioritizing the success of our customers above all,” said Jongshin Shin, corporate executive vice president of Foundry IP Development at Samsung Electronics. “We are pleased to announce a significant expansion of the SAFE program to further expand our IP portfolio to effectively meet the needs of our customers in product innovation and production.”
Samsung provides the IP ecosystem with the latest foundry process information needed to develop progressive IP such as Process Design Kits (PDK) and Design Methodologies (DM). IP providers then develop IP optimized for Samsung foundry processes to provide to global fabless customers. After that, the SAFE program provides customers with certified design flows and access to advanced packaging solutions, which further enables fast time-to-market.
Fabless customers will be able to utilize IP optimized for Samsung’s foundry processes, aligned with the product development stage. Customers will be able to reduce errors from the earliest stages of design as well as reduce the time and cost of prototyping, validation and mass production.
Samsung will collaborate with the IP ecosystem to develop high-speed interface IP for next-generation protocols such as PCIe 6.0, 112G SerDes and DDR5/LPDDR5X/GDDR7. The company is also seeking to strengthen its portfolio to develop IP for Compute Express Link (CXL) 3.0 and Universal Chiplet Interface express (UCIe), which are used on leading-edge packages such as chiplets. Additionally, it will support automotive IP solutions that meet the highest levels of automotive semiconductor reliability standards and quality standards, such as the AEC-Q100* and ASIL levels*.
Further details of the IP ecosystem as well as Samsung’s roadmap and strategy for IP development will be unveiled at the SAFE Forum on June 28 in San Jose, California.