Delivering new levels of performance and flexibility for SoC verification and early software development, Synopsys, Inc. today announced the industry’s first unified hardware system for emulation and prototyping based on the Synopsys ZeBu EP1 emulation system. By adding prototyping functionality to Synopsys ZeBu EP1, the industry’s fastest billion-gates emulation system, customers can take advantage of a single verification hardware system throughout their chip development lifecycle.
“As software content and hardware complexity keep growing, SoC design teams are consistently looking for more and faster emulation and prototyping capacity to achieve their hardware verification and software development goals,” said Rohit Vora, senior vice president of R&D in the Systems Design Group at Synopsys. “The Synopsys ZeBu EP1 system represents a major innovation in verification hardware by providing a single system supporting both emulation and prototyping with higher performance and faster emulation compile time. With Synopsys ZeBu EP1 system, industry-leading companies have achieved 19-MHz emulation and 100-MHz prototyping clock performance, enabling them to run large amounts of software pre-silicon and accelerate project schedules.”
Unified Emulation and Prototyping System Benefits
Hardware verification teams use emulation systems for faster SoC design verification, while software development teams need the additional performance that can be achieved with prototyping technology. However, it has been challenging for chip and system development teams to determine upfront the optimal balance of emulation and prototyping hardware capacity. The new Synopsys ZeBu EP1 system with flexible hardware helps eliminate this dilemma. Teams are free from the constraints of fixed hardware, allowing their verification and software development requirements to drive how and when to shift capacity between emulation and prototyping, rather than having to estimate early on how much of each resource might be needed.
The unified hardware system provides an easy-to-bring-up emulation flow with high performance and support for full debug visibility. Verification and software teams can validate designs against real-world interfaces at the highest possible performance using the prototyping flow of the ZeBu EP1 system. The unified hardware also benefits from Synopsys’ new faster compile technology to reduce turnaround time by up to 3x compared to the previous generation’s compile technology.
Synopsys protocol solutions for ZeBu EP1 offer a wide range of connectivity options to enable execution of complex software stacks and support many advanced interface protocols, such as PCI Express (PCIe) 5.0/6.0, USB 4, HBM3 and Universal Chiplet Interconnect Express (UCIe) through:
- At-speed connectivity with protocol interface cards
- Transactors, including virtual testers for virtual interface connectivity
- Speed adapters for in-circuit emulation
- Synopsys IP Prototyping Kits, for fast IP integration, software development and system validation
In combination with the Synopsys Virtualizer virtual prototyping tool, software developers have access to a fast hardware target for their software development and testing using unified hardware for hybrid emulation and prototyping.
What Industry Leaders Are Saying
“Compute is becoming increasingly complex and it is critical that we work together to ease some of the hardware and software challenges to clear a path for innovation,” said Tran Nguyen, senior director of Design Services at Arm. “As more Arm-based software-intensive applications are developed across mobile graphics, automotive, 5G and HPC, there is an increasing demand for emulation and prototyping capacity. Synopsys ZeBu EP1 system helps address the need for more verification cycles by providing a unified hardware with flexible capacity at the fastest performance.”
“Synopsys continues to innovate its verification hardware family with the latest Synopsys ZeBu EP1 system, the first unified hardware to scale emulation and prototyping capacity,” said Narendra Konda, vice president of Hardware Engineering at NVIDIA. “As NVIDIA continues to increase the pace of innovation across compute-intensive domains like GPU, AI and ADAS, our long-standing collaboration with Synopsys enables us to meet verification and validation needs for chip designs today and well into the future.”
