Chip design simulation remains an important tool, but manufacturing and supply chain simulators are equally critical – e.g., digital twins and chiplets. Die hardware integration security looks to be the new threat target for modern systems, and CMOS 2.0 may make the challenge even more significant.
CAMECA Partners with imec on Atom Probe Tomography
IMEC’s acquisition of CAMECA’s Invizo 6000 will contribute to its advanced research and development for future logic, memory, and interconnected architectures.
Getting the Most Out of Your System
In an article published in the June/July issue of Semiconductor Digest, imec researchers introduce a unique simulation framework. This helps designers manage the complexity of performing cross-‘world’ optimizations – in order to enable the grand applications of the future.
How Chip Technology Will Decipher Brain Diseases
As part of Mission Lucidity, the brain-on-chip project tackles Parkinson’s disease. Central in this endeavor is imec’s high-density multi-electrode array (MEA) that can interface at a single-cell level. With stem cell technology that can reprogram cells, the MEA can create and tweak any relevant brain circuit to study disease mechanisms and the effects of drugs on the circuits.
About Qubits and Quantum Circuits
Imec is enabling technology for quantum computing with semiconductor and superconductor-based qubits, and the design of custom circuits adapted to cryotemperatures.
A 300mm Platform for 2D-Material Based MOSFET Devices
2D materials, a family of materials that form two-dimensional crystals, promise to enable a broad range of semiconductor applications, such as selectors or back-end compatible transistors.
The History and Future of DRAM Architecture in Different Application Domains: An Analysis
Common trends and bottlenecks in DRAM architecture are identified.
EUV Lithography: Sailing Along the Stochastic Cliffs
Stochastic printing failures are random, non-repeating, isolated defects such as microbridges, locally broken lines and missing or merging contacts.
EUV Lithography: Weighing the Options for Future Logic and Memory Applications
Imec takes a great leap forward in understanding and pushing the limits of extreme ultraviolet lithography – part I
Reliable ICs from unreliable devices
In an article published in the most recent issue of imec’s online magazine (http://magazine.imec.be/) titled “Chips must learn how to feel pain and how to cure themselves,” researchers Francky Chatthoor and Guido Groeseneken discuss how to build reliable “5nm-node” ICs…
